
Table 4-4. Coding for Base + 02 Register Functions
ID Register Not defined11
Status Register #2 Scan Limits Reg01
Status Register #2 Conversion Control10
Status Register #2 Control Reg # 100
Read Function Write FunctionCS0CS1
Control Register Selected
Table 4-5. Special Programming Instructions
External Interrupt is rising edge, External Pacer is falling edge
External Interrupt and External (Pacer) Clock are mutually exclusiveINT/XCLK
Bit
"Gate", Requires DTEN=1, GTEN=0LevelGating
Requires DTEN=1, GTEN=0EdgeTriggering
CT/1 decrements each time CT/2 counts to zero; AD converts when CT/1 counts
to zero
Cascade
CT/2 divides the 1MHz timebase; AD converts when CT/2 counts to zeroNormalPacing
Operating
modes
Not appplicable.Gain/Range
ID 1/0: 0/0= (DAS800], 0/1= reserved, 1/0= N/A, 1/1= N/A)
Only the 1st two bits are needed for software, the upper six are for compatibility with KMB
software
ID
Select Start and End Channel before setting EACS
Ending channel (n) can be lower than starting channel (m) : m,...,6,7,0,1,...,n,m...Scan Limits
Set HCEN last, by itself (ie write 80h) , set the other bits first
HCEN is used as a master enable for AD PacingConv/Control
Register
Special Programming instructions
12
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