Measurement-computing CIO-DAS801 Manuale Utente Scaricare il pdf (Pagina 19)

CIO-DAS801 User's Guide Specifications

Parameter

Specification

Unipolar

10 V 100% / 99.96% / 4 bins

1 V 100% / 99.59% / 4 bins

0.1 V 99.95% / 98.73% / 6 bins

0.01 V 72.8% / 49% / 24 bins

Digital input/output

Table 2. Digital I/O specifications

Digital type

FPGA

Configuration

Two ports, 3 input and 4 output

Input low voltage

0.8 V max

Input high voltage

2.0 V min

Output low voltage (IOL = 4 mA)

0.32 V max

Output high voltage (IOH = -4 mA)

3.86 V min

Absolute maximum input voltage

-0.5 V, +5.5 V

Interrupts

Jumper selectable: levels 2, 3, 4, 5, 6, 7 or not connected

Positive edge triggered

Interrupt enable

Programmable

Interrupt sources

External (IR Input / XCLK), A/D End-of-conversion, A/D FIFO-half-full

Counters

Table 3. Counter specifications

Counter type

82C54

Configuration

3 down counters, 16-bits resolution

Counter 0 — Independent, user counter

Source: External, user connector (CTR0 In)

Gate: External, user connector (CTR0 Gate)

Output: User connector (CTR0 Out)

Counter 1 — ADC Pacer Lower Divider

or independent user counter

Source: User connector (CTR1 In) and optionally CTR2 Out,

selectable by software

Gate: Programmable, disabled or user connector (CTR1 Gate)

Output: User connector (CTR1 Out) and optionally to A/D start

convert, software selectable

Counter 2 — ADC Pacer Upper Divider

Source: Internal 1 MHz oscillator

Gate: Programmable, disabled or user connector (CTR2 Gate)

Output: User connector (CTR2 Out) and optionally to CTR1 In,

software selectable

Clock input frequency

10 MHz max

High pulse width (clock input)

30 ns min

Low pulse width (clock input)

50 ns min

Gate width high

50 ns min

Gate width low

50 ns min

Input low voltage

0.8 V max

Input high voltage

2.0 V min

Output low voltage

0.4 V max

Output high voltage

3.0 V min

Crystal oscillator

Frequency: 10 MHz

Frequency accuracy: 100 ppm

1 2 ... 14 15 16 17 18 19 20 21 22

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