
PCI-DIO96H User's Guide Introducing the PCI-DIO96H
8
PCI-DIO96H block diagram
PCI-DIO96H functions are illustrated in the block diagram shown here.
PCI-DIO96H
Block Diagram
PCI
Controller
BADR2
Boot
EEPROM
Control
Registers
Decode/Status
Bus
Timing
Controller FPGA and Logic
LOCAL BUS
PCI BUS (5V, 32-BIT, 33MHZ)
Control
Bus
FIRSTPORTA
FIRSTPORTB
Control
HIGH DRIVE
FIRSTPORT
FIRSTPORTCH
SECONDPORTA
SECONDPORTB
Control
HIGH DRIVE
SECONDPORT
THIRDPORTA
THIRDPORTB
Control
HIGH DRIVE
THIRDPORT
THIRDPORT HC
FOURTHPORTA
FOURTHPORTB
Control
HIGH DRIVE
FOURTHPORT
FOURTHPORTCH
FIRSTPORTA(7:0)
FIRSTPORTB(7:0)
FIRSTPORTCH(3:0)
THIRDPORTA(7:0)
THIRDPORTB(7:0)
THIRDPORTCH(3:0)
FIRSTPORTCL(3:0)
FIRSTPORTCL
SECONDPORTA(7:0)
SECONDPORTB(7:0)
SECONDPORTCH(3:0)
SECONDPORTCL(3:0)
SECONDPORTCH
SECONDPORTCL
THIRDPORTCL
THIRDPORTCL(3:0)
FOURTHPORTCH
FOURTHPORTCL
FOURTHPORTA(7:0)
FOURTHPORTB(7:0)
FOURTHPORTCH(3:0)
FOURTHPORTCL(3:0)
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